11-01-2015, 05:27 PM
Hello,
having problems with LGA771 server platform. I have following sets of CPUs:
2x Xeon X5460
2x Xeon X5420
2x Xeon X5355
all of that CPUs supports execute disable bit and thermal monitoring, and for CPU X5355 that options shows up in Advanced Processor Options, but not for X5460 and E5420. I can't enable it, so i can't use fully some software. I made an attempt to update microcode, even after that, that options not available for 54xx CPUs.
Update:
Thanks to DeathBringer, i was able to make a fixes to startup code at BIOSCOD6.ROM:
NX bit:
TM2:
In attached ZIP 238MS720.WPH is original bios from MSI, 238MS720_5.WPH - with updated microcode and fixes.
NX bit is set by default for both types of CPU, same as TM2, but BIOS menu to enable/disable NX bit is available only for old CPUs, i guess because check for BIOS UI is somewhere else.
having problems with LGA771 server platform. I have following sets of CPUs:
2x Xeon X5460
2x Xeon X5420
2x Xeon X5355
all of that CPUs supports execute disable bit and thermal monitoring, and for CPU X5355 that options shows up in Advanced Processor Options, but not for X5460 and E5420. I can't enable it, so i can't use fully some software. I made an attempt to update microcode, even after that, that options not available for 54xx CPUs.
Update:
Thanks to DeathBringer, i was able to make a fixes to startup code at BIOSCOD6.ROM:
NX bit:
Code:
0D9D9: cpuid
0D9DB: and ax,0FFF0
0D9DE: cmp ax,006F0 ; 65nm Xeon CPUs
0D9E1: je 00000DA19
0D9E3: cmp ax,00670 ; 45nm Xeon CPUs
0D9E6: nopTM2:
Code:
DC89: cpuid
DC8B: and ax,0FFF0
DC8E: cmp ax,006F0 ; 65nm Xeon CPUs
DC91: je 00000DCDF
DC93: cmp ax,00670 ; 45nm Xeon CPUs
DC96: je 00000DCDFIn attached ZIP 238MS720.WPH is original bios from MSI, 238MS720_5.WPH - with updated microcode and fixes.
NX bit is set by default for both types of CPU, same as TM2, but BIOS menu to enable/disable NX bit is available only for old CPUs, i guess because check for BIOS UI is somewhere else.