[request] Update microcode in HP BIOS for IPIBL-LB Motherboard

[j5blue]

Processor number                  Xeon E5450              Xeon X5450              Core 2 Quad Q9650
Lithography                           45 nm                      45 nm                      45 nm
Total Cores\Threads               4\4                           4\4                          4\4
Processor Base Frequency       3.0 GHz                    3.0 GHz                    3.0 GHz
L2 Cache                               12 MB                      12 MB                      12 MB
Multiplier                               9                              9                             9
Bus Speed                             1333 MHz                  1333 MHz                 1333 MHz
TDP                                      80 W                         120 W                     95 W
T Case                                  67 C                          63 C                        72 C

With Celeron E3300 on IPIBL-LB default stock PCI / PCIe is 25 / 75 MHz. Is it the same with Xeon E5450, or it is changed to 33 / 100 MHz?



And one question probably not related to topic. Does anyone use 1.44 FDD with IPIBL-LB? I have 3 working FDD's that don't show sign of life on IPIBL-LB.

[Starrynight]

Processor number                  Xeon E5450              Xeon X5450              Core 2 Quad Q9650
Lithography                           45 nm                      45 nm                      45 nm
Total Cores\Threads               4\4                           4\4                          4\4
Processor Base Frequency       3.0 GHz                    3.0 GHz                    3.0 GHz
L2 Cache                               12 MB                      12 MB                      12 MB
Multiplier                               9                              9                             9
Bus Speed                             1333 MHz                  1333 MHz                 1333 MHz
TDP                                      80 W                         120 W                     95 W
T Case                                  67 C                          63 C                        72 C

With Celeron E3300 on IPIBL-LB default stock PCI / PCIe is 25 / 75 MHz. Is it the same with Xeon E5450, or it is changed to 33 / 100 MHz?



And one question probably not related to topic. Does anyone use 1.44 FDD with IPIBL-LB? I have 3 working FDD's that don't show sign of life on IPIBL-LB.

Strange. SetFSB and ClockGen show different values.
   

[j5blue]

Strange. SetFSB and ClockGen show different values.

Didn't know that SetFSB is with much more options, and allow dedicated PCI / PCIe adjustement. With ClockGen PCI / PCIe ratio is locked. Must check device (CV174C) datasheet, anyway.

Theoretically, PCIe v1.0 x 4 transfer is 1.000 GB/s, and I found on youtube video this...



that is similar to my benchmarks.

[j5blue]

ClockGen display real PCIe clock value, that can be changed (by ClockGen). SetFSB doesn't display real PCIe clock value, and PCIe clock change (by SetFSB) don't update real PCIe clock value. Based on NVMe CDMark benchmark results.

IPIBL-LB default stock PCI / PCIe is 25 / 75 MHz.