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[REQUEST] Dell Precision T5810 BIOS Unlock
Hi everyone. Got a dell t5810 with an e5-1650v3 cpu. It's unlocked and I've been overclocking with TS. I've got power and current limits that I can't change so I wish to mod the bios. I have a ch341a on order and a bench kit so I can use one of my old atx psus so I can lift the power pins on the usb and feed in 3.3v. I've read this is an issue. I've also obtained amibcp 5.02.0031. just here to see what all info and software I'll be needing to pull a bios dump and modify it then flash it. I'd rather not ask for someone to mod it for me as I'd like to learn that process. Any help will be appreciated. I did get into intel ME to get the full version number and I saved a report through hwinfo64 if any of that info would help in making decisions on what I need.
HWiNFO64 Version 6.40-4330

DESKTOP-BEJAHC2 -----------------------------------------------------------

[Current Computer]
Computer Name: DESKTOP-BEJAHC2
Computer Brand Name: DELL Precision Tower 5810
[Operating System]
Operating System: Microsoft Windows 10 Professional (x64) Build 18363.1316 (1909/November 2019 Update)
UEFI Boot: Present
Secure Boot: Present

Central Processor(s) ------------------------------------------------------

[CPU Unit Count]
Number Of Processor Packages (Physical): 1
Number Of Processor Cores: 6
Number Of Logical Processors: 12

Intel Xeon E5-1650 v3 -----------------------------------------------------

[General Information]
Processor Name: Intel Xeon E5-1650 v3
Original Processor Frequency: 3500.0 MHz
Original Processor Frequency [MHz]: 3500
CPU ID: 000306F2
CPU Brand Name: Intel® Xeon® CPU E5-1650 v3 @ 3.50GHz
CPU Vendor: GenuineIntel
CPU Stepping: R2
CPU Code Name: Haswell-EP WS
CPU Technology: 22 nm
CPU S-Spec: SR20J
CPU Thermal Design Power (TDP): 140.0 W
CPU Thermal Design Current (TDC): 208.0 A
CPU Power Limits (Max): Power = Unlimited, Time = Unlimited
CPU Power Limit 1 - Long Duration: Power = 140.00 W, Time = 10.00 sec [Unlocked]
CPU Power Limit 2 - Short Duration: Power = 168.00 W, Time = 7.81 ms [Unlocked]
Configurable TDP Level 1 (Down): 140.00 W (18.50 W - Unlimited), 3200 MHz
Current Configurable TDP Level: Nominal [Unlocked]
CPU Max. Junction Temperature (Tj,max): 95 °C
CPU Type: Production Unit
CPU Platform: Socket R3 (LGA2011-3)
Microcode Update Revision: 43
Number of CPU Cores: 6
Number of Logical CPUs: 12
[Operating Points]
CPU MFM (LowPower): 800.0 MHz = 8 x 100.0 MHz
CPU LFM (Minimum): 1200.0 MHz = 12 x 100.0 MHz
CPU HFM (Base): 3500.0 MHz = 35 x 100.0 MHz
CPU Turbo Max: 3800.0 MHz = 38 x 100.0 MHz [Unlocked]
Turbo Ratio Limits: 38x (1-2c), 36x (3-18c)
CPU Current: 3591.7 MHz = 36 x 99.8 MHz @ 1.0023 V
LLC/Ring Maximum: 3000.0 MHz = 30.00 x 100.0 MHz
LLC/Ring Current: 2993.1 MHz = 30.00 x 99.8 MHz
CPU Bus Type: Intel Direct Media Interface (DMI) v2.0
Maximum DMI Link Speed: 5.0 GT/s
Current DMI Link Speed: 5.0 GT/s
PCI-Express Current Clock: 99.8 MHz = 1.00 x 99.8 MHz
Number of Overclocking Bins: Unlimited
[IA Overclocking]
Voltage Offset: Supported
Voltage Override: Supported
Ratio Overclocking: Supported
Fused Ratio Limit: 80x
OC Ratio Limit: N/A
Voltage Mode: Adaptive
Voltage Offset: 0 mV
[CLR (CBo/LLC/Ring) Overclocking]
Voltage Offset: Supported
Voltage Override: Supported
Ratio Overclocking: Supported
Fused Ratio Limit: 80x
OC Ratio Limit: N/A
Voltage Mode: Adaptive
Voltage Offset: 0 mV
[Uncore/SA Overclocking]
Voltage Offset: Supported
Voltage Override: Not Supported
Ratio Overclocking: Not Supported
Fused Ratio Limit: N/A
OC Ratio Limit: N/A
Voltage Mode: Adaptive
Voltage Offset: 0 mV
[Cache and TLB]
L1 Cache: Instruction: 6 x 32 KBytes, Data: 6 x 32 KBytes
L2 Cache: Integrated: 6 x 256 KBytes
L3 Cache: 15 MBytes
Instruction TLB: 2MB/4MB Pages, Fully associative, 8 entries
Data TLB: 4 KB Pages, 4-way set associative, 64 entries
[Standard Feature Flags]
FPU on Chip Present
Enhanced Virtual-86 Mode Present
I/O Breakpoints Present
Page Size Extensions Present
Time Stamp Counter Present
Pentium-style Model Specific Registers Present
Physical Address Extension Present
Machine Check Exception Present
CMPXCHG8B Instruction Present
APIC On Chip / PGE (AMD) Present
Fast System Call Present
Memory Type Range Registers Present
Page Global Feature Present
Machine Check Architecture Present
CMOV Instruction Present
Page Attribute Table Present
36-bit Page Size Extensions Present
Processor Number Not Present
CLFLUSH Instruction Present
Debug Trace and EMON Store Present
Internal ACPI Support Present
MMX Technology Present
Fast FP Save/Restore (IA MMX-2) Present
Streaming SIMD Extensions Present
Streaming SIMD Extensions 2 Present
Self-Snoop Present
Multi-Threading Capable Present
Automatic Clock Control Present
IA-64 Processor Not Present
Signal Break on FERR Present
Virtual Machine Extensions (VMX) Present
Safer Mode Extensions (Intel TXT) Present
Streaming SIMD Extensions 3 Present
Supplemental Streaming SIMD Extensions 3 Present
Streaming SIMD Extensions 4.1 Present
Streaming SIMD Extensions 4.2 Present
AVX Support Present
Fused Multiply Add (FMA) Present
Carryless Multiplication (PCLMULQDQ)/GFMUL Present
CMPXCHG16B Support Present
MOVBE Instruction Present
POPCNT Instruction Present
XGETBV/XSETBV OS Enabled Present
Float16 Instructions Present
AES Cryptography Support Present
Random Number Read Instruction (RDRAND) Present
Extended xAPIC Present
MONITOR/MWAIT Support Present
Thermal Monitor 2 Present
Enhanced SpeedStep Technology Present
L1 Context ID Not Present
Send Task Priority Messages Disabling Present
Processor Context ID Present
Direct Cache Access Present
TSC-deadline Timer Present
Performance/Debug Capability MSR Present
IA32 Debug Interface Support Present
64-Bit Debug Store Present
CPL Qualified Debug Store Present
[Extended Feature Flags]
64-bit Extensions Present
RDTSCP and TSC_AUX Support Present
1 GB large page support Present
No Execute Present
SYSCALL/SYSRET Support Present
Bit Manipulation Instructions Set 1 Present
Bit Manipulation Instructions Set 2 Present
Advanced Vector Extensions 2 (AVX2) Present
Advanced Vector Extensions 512 (AVX-512) Not Present
AVX-512 Prefetch Instructions Not Present
AVX-512 Exponential and Reciprocal Instructions Not Present
AVX-512 Conflict Detection Instructions Not Present
AVX-512 Doubleword and Quadword Instructions Not Present
AVX-512 Byte and Word Instructions Not Present
AVX-512 Vector Length Extensions Not Present
AVX-512 52-bit Integer FMA Instructions Not Present
Secure Hash Algorithm (SHA) Extensions Not Present
Software Guard Extensions (SGX) Support Not Present
Supervisor Mode Execution Protection (SMEP) Present
Supervisor Mode Access Prevention (SMAP) Not Present
Hardware Lock Elision (HLE) Not Present
Restricted Transactional Memory (RTM) Not Present
Memory Protection Extensions (MPX) Not Present
Read/Write FS/GS Base Instructions Present
Enhanced Performance String Instruction Present
INVPCID Instruction Present
RDSEED Instruction Not Present
Multi-precision Add Carry Instructions (ADX) Not Present
PCOMMIT Instructions Not Present
CLFLUSHOPT Instructions Not Present
CLWB Instructions Not Present
Platform Quality of Service Monitoring (PQM) Present
Platform Quality of Service Enforcement (PQE) Not Present
FPU Data Pointer updated only on x87 Exceptions Not Present
Deprecated FPU CS and FPU DS Present
Intel Processor Trace Not Present
PREFETCHWT1 Instruction Not Present
AVX-512 Vector Bit Manipulation Instructions Not Present
AVX-512 Vector Bit Manipulation Instructions 2 Not Present
AVX-512 Galois Fields New Instructions Not Present
AVX-512 Vector AES Not Present
AVX-512 Vector Neural Network Instructions Not Present
AVX-512 Bit Algorithms Not Present
AVX-512 Carry-Less Multiplication Quadword (VPCLMULQDQ) Not Present
User-Mode Instruction Prevention Not Present
Protection Keys for User-mode Pages Not Present
OS Enabled Protection Keys Not Present
Wait and Pause Enhancements (WAITPKG) Not Present
Total Memory Encryption Not Present
Read Processor ID Not Present
Cache Line Demote Not Present
MOVDIRI: Direct Stores Not Present
MOVDIR64B: Direct Stores Not Present
ENQCMD: Enqueue Stores Not Present
SGX Launch Configuration Not Present
Control-Flow Enforcement Technology (CET) Shadow Stack Not Present
AVX-512 4 x Vector Neural Network Instructions Word Variable Precision Not Present
AVX-512 4 x Fused Multiply Accumulation Packed Single Precision Not Present
Fast Short REP MOV Not Present
AVX-512 VP2INTERSECT Support Not Present
MD_CLEAR Support Present
Hybrid Processor Not Present
Platform Configuration (PCONFIG) Not Present
Indirect Branch Restricted Speculation (IBRS), Indirect Branch Predictor Barrier (IBPB) Present
Single Thread Indirect Branch Predictors (STIBP) Present
L1D_FLUSH Support Present
Speculative Store Bypass Disable (SSBD) Present
Control-Flow Enforcement Technology (CET) Indirect Branch Tracking Not Present
Advanced Matrix Extensions (AMX) Tile Architecture Not Present
Advanced Matrix Extensions (AMX) bfloat16 Support Not Present
Advanced Matrix Extensions (AMX) 8-bit Integer Operations Not Present
AVX-512 BFLOAT16 Instructions Not Present
[Enhanced Features]
Thermal Monitor 1: Supported, Enabled
Thermal Monitor 2: Supported, Enabled
Enhanced Intel SpeedStep (GV3): Supported, Enabled
Bi-directional PROCHOT#: Enabled
Extended Auto-HALT State C1E: Enabled
MLC Streamer Prefetcher Supported, Enabled
MLC Spatial Prefetcher Supported, Enabled
DCU Streamer Prefetcher Supported, Enabled
DCU IP Prefetcher Supported, Enabled
Intel Dynamic Acceleration (IDA) Technology: Not Supported
Intel Dynamic FSB Switching: Not Supported
Intel Turbo Boost Technology: Supported, Enabled
Programmable Ratio Limits: Supported, Disabled
Programmable TDC/TDP Limits: Supported, Disabled
Hardware Duty Cycling: Not Supported
[CPU Scalable Features]
GSSE256 Instructions: Enabled
AES: Enabled
LT SX (TXT for Servers): Enabled
LT Production: Enabled
SMX: Enabled
VMX: Enabled
VT-x3: Enabled
VT Real Mode: Disabled
VT CPAUSE: Disabled
Multi-Threading (HT): Enabled
Programmable TDP Limits: Enabled
EX Config: Disabled
EP 4S Config: Disabled
EP (1S/2S) Config: Enabled
EN (1S/2S) Config: Disabled
UP (1S/WS) Config: Enabled
Memory Channel Mirroring Mode: Enabled
Memory LT Support: Enabled
Memory Frequency Support: Over-Clocking Supported
Physical Address Size Supported (Core): 46-bit
Extended APIC (x2APIC): Enabled
CPU HOT ADD: Disabled
GV3: Enabled
Core RAS (Data Poisoning, MCA Recovery): Enabled
DCA: Enabled
QPI Link 2: Disabled
QPI Link 1: Disabled
QPI Link 0: Disabled
Maximum Supported QPI ratio: 6.4 GT/s
NTB: Enabled
RAID-on-load: Enabled
PCIe LT SX: Enabled
PCIe LT: Enabled
PCIe Gen 3: Enabled
PCIe DMA: Enabled
DMI: Enabled
DDR4: Enabled
Monroe Technology: Disabled
SMBus Write Capability: Enabled
Extended Addressing DIMM: Disabled
Extended Latency DIMM: Enabled
Patrol Scrub: Enabled
Rank Sparing: Disabled
UDIMM Support: Enabled
RDIMM Support: Enabled
DIR: Disabled
ECC: Enabled
QR DIMM: Enabled
CLTT: Enabled
3N Mode: Enabled
4Gb DDR3: Enabled
8Gb DDR3: Enabled
Memory Channel 0: Enabled
Memory Channel 1: Enabled
Memory Channel 2: Enabled
Memory Channel 3: Enabled
CPU Stepping: R2
DRAM Power Meter: Enabled
DRAM RAPL: Enabled
Overclocking: Enabled
Energy Efficient Turbo: Enabled
Per-core P-states: Enabled
Uncore Frequency Scaling (UFS): Enabled
System Agent Power Management (SAPM) Dynamic Load Line (DLL): Enabled
Targeted SMI: Enabled
SMM CPU Save/Restore: Enabled
SMM Code Access Check: Enabled
Enhanced MCA: Enabled
FMA Instructions: Enabled
Hardware Lock Elison (HLE): Enabled
Hardware Lock Elison+ (HLE+)/RTM: Enabled
Cache Allocation Technology (CAT): Disabled
Cache Monitoring Technology (CMT): Enabled
Voltage Override Overclocking: Enabled
BCLK Coarse Ratio Support (PCIe Ratio Changing): Enabled
Physical Chop: Low-Core Count (LCC)
Product Type: Haswell
PCIE Ratio Change: Enabled
VMCS Shadowing: Enabled
FIT Boot: Enabled
PFAT: Enabled
Error Spoofing: Disabled
COD: Disabled
Haswell New Instructions: Enabled
Second Home Agent: Disabled
[Memory Ranges]
Maximum Physical Address Size: 46-bit (64 TBytes)
Maximum Virtual Address Size: 48-bit (256 TBytes)
Range 80000000-100000000 (2048MB-4096MB) Type: Uncacheable (UC)
Range 40000000-80000000 (1024MB-2048MB) Type: Uncacheable (UC)
Range 30000000000-34000000000 (3145728MB-3407872MB) Type: Uncacheable (UC)
Range 3E000000-40000000 (992MB-1024MB) Type: Uncacheable (UC)
Range E0000000-F0000000 (3584MB-3840MB) Type: Write Through (WT)
Range F0000000-F2000000 (3840MB-3872MB) Type: Write Through (WT)

Motherboard ---------------------------------------------------------------

Computer Brand Name: DELL Precision Tower 5810
Motherboard Model: DELL 0HHV7N
Motherboard Chipset: Intel C612 (Wellsburg-G)
Motherboard Slots: 1xPCI, 2xPCI Express x1, 6xPCI Express x4, 1xPCI Express x8, 2xPCI Express x16
PCI Express Version Supported: v3.0
USB Version Supported: v3.0
BIOS Manufacturer: Dell Inc.
BIOS Date: 10/19/2020
BIOS Version: A34
UEFI BIOS: Capable
Super-IO/LPC Chip: SMSC FDC37C93xFR
and The ME Version is 
sorry for the multiple post but posting here seems very odd using mobile chrome or my laptop.
I managed to unpack a bios.exe file from Dell and view it in amibcp. Trying to figure out everything that needs unlocked and how I can tell if I'm actually unlocking it. Don't have my programmer yet but still need someone with some experience to chime in.
Got my ch134a today. I also got an atx bench breakout board. Plan is to pull the 5v line and ground straight out of the usb socket and attach leads to my breakout board to supply 3.3 and ground. Old atx psu I have is 400 watt and has a 20 amp 3.3v rail which should obviously be more than enough to power the chip while attached to the motherboard that will otherwise be disconnected from any power source. This idea is going off things I've read about the 3.3v regulator not doing a well enough job and not being able to supply enough when the bios chip ends up backfeeding through the attached motherboard. Any reason I should not go this route?
Modded the programmer and it worked great. Pulled 3 working dumps. Still have concerns modding now with there possibly being a boot guard on this system that isn't going to like a custom bios. Again if anyone has any input. Here's the photos of what I did to the programmer. Nevermind it's not letting me add photos today. If that changes I'll put them up. Anyways changing the power input to the programmer to 3.3v ended up changing the 3.3v pin on the board to 2.2v as it was reduced by the regulator. Easy fix was to add a jumper to the 3.3v pin and the 5v pin that are next to each other on the side of the board. This effectively bypasses the regulator and turns the whole programmer into a 3.3v device.
Flashed my modded bios without bricking win! However I didn't get anything out of it. Anything I didn't have I still don't. I set ALOT of menus in amibcp to user root and didn't change a thing. I pulled another dump and verified that file in amibcp that it is indeed the modded bios. What the [censored] happened?
You can try to unhide menus using this patch example.
[Image: image.png]
I'm sorry could you expand on that patch? I can see notes on it but is that it? Anymore detail would be appreciated.
Tried to do it myself. Hidden menus still hidden after using amibcp. I have added the original bios and what I modded with amibcp to my Google drive. I can take photos of my current bios configuration (screen shot to usb doesn't seem to work) but it's very limited not many options available. Looking to have full overclock, memory clock, tdp limits and all current limits available. Or not sure how some of you do this unlock the whole thing... Greatly appreciate any help.

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